SiS Standardized on Silicon Canvas' Laker as Its Custom Layout Tool
San Jose, Calif., Sep. 30, 2002 -- Silicon Canvas, Inc. (SCI), an EDA company that provides next-generation, custom layout solutions for analog, mixed-signal and system-on-chip (SoC) designs, announced today that Silicon Integrated Systems Corporation (SiS), a Taiwanese leading core logic and graphics chip set supplier, has extended its adoption of Laker as the standard for its full custom layout tools. SiS has built a production flow with Laker that enables them to strengthen their core technology advancement and time-to-market product launch capability. Laker will also be used in the Post P&R modification of SiS's multimillion gates SoC chips. These SoC chips will be part of a broad logic technology base including CPU, core logic, 3D graphics, and connectivity with advanced 180nm (0.18µm) and 150 nm (0.15µm) processes.
"We are continuously exploring innovative approaches to improve our custom layout engineering productivity to the overall design process. Physical design for full-custom blocks and Post P&R modification are the common bottlenecks in large SoC applications. Laker provides powerful layout editing features that dramatically increase the yield of our custom layout projects. Moreover, Laker can handle large designs much more efficiently than any other tool due to its super fast database engine and hierarchy net tracing capabilities. These features save us time and resources for our Post P&R fine tuning and provide us the capability to complete as many multi-million gate SoC chips," said Mr. Chris Lin, VP of R&D at SiS. "With a unique combination of performance, accuracy, capability and ease of use, Laker also allows us to compete more effectively with other leading manufacturers in this market segment. Laker is a key enabler in accelerating our customers design schedules."
"Laker helps our projects a lot. The ease of use with the tools means we wouldn't be facing a learning curve that we didn't have time for," said Ms. Jane Lu, Layout Manager at SiS. "We were impressed by the efficient editing function it provides to our full-custom layout. Laker enables our projects to be launched on schedule. We are able to come up to speed very quickly."
"SiS designs and builds some of the world's most advanced products and is an important partner of ours. To remain ahead of the field, SiS must continually deliver new chips that meet ever-increasing thresholds for speed and density, and always under tight deadlines. I am delighted we are helping our early proponents to increase productivity and decrease their time-to-market. " said Dr. Hau-Yung Chen, president of Silicon Canvas, Inc. "This demonstrates the growing demand for our custom layout solutions that enable and improve time-to-market by speeding up each step in the process, all the way from cell, block to chip implementation. Our customers are leveraging Laker to meet the many layout challenges created by explosive growth. We look forward to expanding our business partnerships in the semiconductor industry."
About Silicon Canvas' Laker
Laker is the next generation of full custom, layout solutions, delivering 6X productivity gains through automation, performance, capacity, and openness. With its patented MagicCell and the Rule-Driven technology, Laker is the ideal layout solution for memory, analog and mixed signal designs. With its optimized database and point-to-point shape-based router, Laker is also a perfect flow plug-in tool for complex ASIC and SoC designs to efficiently fix the timing closure issues and to assemble top level blocks including the top cell signal routing and power routing or any special routing. Laker has been well proven in production with more than 200 seats installed and with more than 400 chips taped out.
About Silicon Canvas
Silicon Canvas is a California corporation founded in 2000 by Dr. Hau-Yung Chen and other EDA veterans with combined 50+ years of custom design and EDA experiences. Silicon Canvas' mission is to provide the next generation of full custom layout solutions to significantly increase productivity and reduce time- to- market. Its custom layout solution, Laker, provides more automation and high performance capabilities to any design projects, which requires the use of full custom layout editors, including but not limited to the layout creation for analog, mixed signal, and test key designs. Silicon Canvas customers use Laker in a wide range of design projects including memory, high performance CPU, embedded controllers, networking, telecommunications, multimedia, and graphics. Silicon Canvas is headquartered in San Jose, Calif. For more information please visit Silicon Canvas' web site at www.sicanvas.com or send email to info@sicanvas.com.
About SIS
Silicon Integrated Systems Corp. (SiS), a leading core logic and graphics supplier, was founded in 1987 in the Hsin-chu Science-based Industrial Park in Taiwan. Combining a broad logic technology base (CPU, core logic, 3D graphics, connectivity) with advanced fab (0.18u/0.15u/0.13u), the company is well positioned to be a leader in system-on-a-chip (SoC).
The company has been listed on the Taiwan Stock Exchange (TSE2363) since August 1997. For further information, please visit SiS website: http://www.SiS.com
